A computing device includes a processor to execute instructions and a memory to store the instructions and associated data. Often the memory accessed by the processor is integral to the device and operates in a specific and expected manner. However, some computing devices may access memory that is external to the core processing function of the computing device. To maintain flexibility and cost efficiency, these computing devices should be able to access a variety of different memories.
Existing computing devices may incorporate an external memory interface that allows access to dynamic random access memories (DRAMs) of varying bit widths. Similarly, this interface may support static RAMs, read-only memory (ROM) devices, flash memories, and other standard memories of varying bit widths. However, these existing computing devices perform memory accesses (reads and writes) on a fixed bit width basis. For example, each read of a four bit wide DRAM is actually four consecutive four bit reads of the DRAM. Memory interface circuitry automatically performs the four consecutive reads, builds the sixteen bit word in a data register, and places the word on the processor data lines. This known technique processes data occupying each of the processor data lines, which may present certain disadvantages and drawbacks for some newer memory devices.